By Kathleen Philips, Arthur H. M. van Roermund (auth.)

1.1 historical past Moore’s legislation predicts a reduce via an element of 2 within the characteristic measurement of CMOS te- nology each 3 years and has been legitimate for years. It implies a doubling of the - eration velocity and a 4 occasions larger transistor count number according to unit of region, each 3 years. the mix ends up in an 8 instances larger processing power consistent with unit of sector. This on-going miniaturization permits the combination of advanced digital structures with thousands of transistors (Very-Large-Scale-Integration) and allows the combination of el- tronic platforms. An digital approach A widespread photo of an built-in digital method is proven in ?g. 1.1. the guts of the process is the sign processing center. This middle helps a large choice of capabilities, corresponding to customization and programmability of a number of purposes, channel coding, the de?nition of the person interface, and so on. those services are enabled through DSP, a controller CPU and diverse blocks of reminiscence. In complex ICs those blocks supply (almost) all sign processing and typically dominate within the total strength and region intake of built-in platforms. the massive info premiums concerned, require high-speed busses for conversation among those blocks. A power-management unit fuels the process via delivering the - propriate provide voltages and currents.

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Historically, the ap5 For a fair comparison, the power consumption in the decimation filter of the designs should be taken into account as well. However, technology scaling is very helpful in reducing this contribution. 4. LIMITATIONS OF A/D CONVERSION 33 plication area of converters has been restricted to low bandwidth, high resolution systems. Even in advanced technologies, though, the achievable sample rate is hampering the adoption of conversion for high-performance, wide-band applications. In the discussion, linear and non-linear limitations are distinguished in the sense that linear limitations (such as phase margin) do scale with technology and current consumption, while non-linear limitations must be overcome by a more than proportional power increase or by innovative circuit design.

4) where SINAD is expressed as a ratio of powers. This FOM is justified by a derivation further on in this chapter that leads to eq. 10 for analog circuits and to eq. 16 for ADCs. As such, this FOM can be used for comparison of both types of circuits. 3 FOM related to signal resolution For Nyquist A/D converters a FOM related to the number of quantization levels is commonly used. 02 Furthermore, the minimum of twice the effective resolution bandwidth f E R B and the Nyquist sample rate is used instead of the signal bandwidth.

Here, it is added that, in view of Shannon’s theorem and in view of power consumption in analog circuits, this is an asset leading to a low-power solution. The second bullet is important for a comparison with Nyquist A/D converters. The overall feedback relaxes various accuracy requirements on analog sub-blocks. Finally, the previous, rather intuitive reasonings are supported by a survey of published power/performance of A/D converters. 1 The Shannon theorem and based signal conditioning The Shannon theorem considers the data rate through a channel.

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